1. Field of the Invention
The present invention is generally related to electronics assembly and is more specifically concerned with quality control of flip chip attachment.
2. Description of the Related Art
Modern electronic assemblies generally contain integrated circuits and digital memory incorporated in semiconductor chips. In early approaches, chips were mounted and contacted electrically via wire bonds running from metallic contact pads around the periphery of the top side of the chip to mating pads on a polymer-based or ceramic chip carrier or substrate. The carrier and chip were typically contained in a package that protected the chip, and had solderable leads for attachment to a circuit board. Later approaches involved wire bonding the chip directly to pads on a circuit board so as to eliminate the package and reduce the footprint of the device. As electronics miniaturization progressed, chips become so small and densely packed with circuitry and circuit elements that even fine-pitched peripheral contacts could no longer provide the needed number of input/output (I/O) connections. Furthermore, wire bond connections introduced appreciable inductive impedance, which limited the device switching speed. These issues were addressed by distributing the electrical contact pads in an area array over one side of the chip, and making electrical contacts via short solder connections.
In the flip chip approach, solder balls are first attached to an array of contact pads distributed over the “top” or active surface of the chip to form a solder ball array. The chip is then flipped upside down and positioned so that the solder balls are aligned with mating contact pads on the substrate, which is typically a polymer-based or ceramic circuit board. The solder interconnections are made by reflow soldering. The empty space between the bottom of the flip chip and the substrate is generally filled with an epoxy underfill material to reduce thermally-induced strain that could cause fatigue cracking of the solder interconnections. For some applications, underfill is also required for heat removal and to provide resistance to acceleration-induced strain. The underfill material, which is typically a proprietary epoxy formulation, is generally injected as a liquid so that air bubbles sometimes produce underfill voids that can cause localized heating/stresses, leading to premature failure. The solder connections may also have inadequate electrical or mechanical properties due to voids, disbonds or insufficient solder ball volume. A means for controlling such underfill and solder defects is needed to improve process yields and to ensure high reliability for critical applications.
The only practical prior art technique for detecting underfill voids is scanning acoustic microscopy, which requires that the part be immersed in water (or another fluid). This technique can be applied only after the epoxy underfill has cured, which precludes reworking the part since the cured epoxy cannot be removed without damaging the chip. Water immersion of the part is also incompatible with in-line inspection so that only a small fraction of the parts can be tested, which provides only statistical process control. A method enabling in-line detection of flip chip attachment defects would provide great benefits in terms of part reliability and process yields.
U.S. Pat. No. 5,585,921 to Pepper et al. describes a laser-ultrasonic system applied to on-line detection of welding defects. In this case, one laser was used to generate an array of acoustic waves within the workpiece and a second laser, coupled with an interferometer, was used to detect vibrations of the workpiece surface produced by the laser-generated acoustic waves. The magnitude of the measured acoustic waves was increased via reflections from incompletely formed welds. The array of acoustic waves was generated and detected via full or partial concentric ring-shaped laser beams designed so that the component waves arrived at the detection site at the same time and were reflected in-phase. This focused the ultrasonic energy on the weld area, enhancing the signal strength and reducing the effects of speckle reflections from rough weld surfaces. Nonetheless, the width of the focus area even with the acoustic wave array was about 1 mm, which is an order of magnitude larger than the resolution needed for detection of flip chip attachment flaws (<100 μm). Such prior art implies that the laser-ultrasonic approach may not be applicable to the flip chip application.
Pepper et al. (Rev. Prog. Quant. NDE, Vol. 17, Plenum Press, New York, 1998) describe void detection in a flip chip package via a laser-ultrasonic technique involving ultrasonic generation on the polymer-based substrate (FR4 material) and detection on the opposite side of the package, i.e., at the top surface of the flip chip. The generation laser employed had a relatively large spot size (˜0.5 mm diameter), which enhanced ultrasonic wave generation with minimal laser-induced damage to the substrate but severely limited the attainable resolution. Nonetheless, the laser power used exceeded the ablation threshold of the FR4 substrate material, rendering the technique partially destructive. Since this prior art approach provided limited resolution, relatively large laser scanning steps (100 μm) were used.